1. Field of the Invention
This invention generally relates to a transducer measuring arrangement and more particularly to CMOS circuit arrangements for measuring voltage from a magnetic transducer element.
2. Description of the Related Art
In currently used electronic apparatus, it is often necessary to measure the output signal from a transducer to assure proper operation. Generally, transducers used in personal computers or similarly designed equipment only provide a very low output signal which makes accurate measurement of transducer output difficult and expensive. Accordingly, some type of amplification is needed to substantial improvement in measurement accuracy. FIG. 1 shows a functional block diagram of a known arrangement for amplifying the output of a device such as a magneto-resistive head of a hard disk unit in processing equipment to provide accurate head output voltage measurement. In FIG. 1, a current source 101 provides a current bias to a magneto-resistive head 103 and a voltage source 105 connects the head 103 to an appropriate reference voltage such as ground. The inputs of a voltage buffer 107 for amplification are coupled to the head 103 and the amplified head signal appears at an output 110. Using amplification, the measurements may be performed without excessive loading of the head 103 at a voltage level suitable for accurate measurement.
FIG. 2 shows a block diagram of a circuit useful as the voltage buffer 107 in FIG. 1. Referring to FIG. 2, one lead from the magneto-resistive head 103 is connected to an input 210 of an operational amplifier 207 and the other lead of the magneto-resistive head 103 is connected to a ground reference. A resistor 201 having a value R has one lead therefrom connected to the other input 213 of the operational amplifier 207 and another lead connected to the ground reference. A feedback resistor 205 having a value 4R is connected between an output 220 of the amplifier 207 and the amplifier input 213. As is well known, the voltage at input 210 substantially appears entirely across the resistor 201 and the current I through resistor 201 isI=V201/R The same current I flows through feedback resistor 205 and the voltage at the output 220 isV220=I(R+4R)=I*5R so that the voltage at the output 220 is 5V201. Accordingly, the operational amplifier 207 provides a voltage gain of 5 and the output voltage of the magneto-resistive head 103 which may be on the order of 200 mv is increased to a voltage in the one volt range to improve the accuracy of the measurement of the head voltage.
FIG. 3 is a detailed diagram of an exemplary prior art CMOS amplifier circuit that may be used as the operational amplifier 207 of FIG. 2. Referring to FIG. 3, there is shown a differential amplifier having inputs 380 and 382 which inputs are applied to the gates of N type CMOS transistors MN301 and MN302. The sources of the NMOS transistors MN301 and MN302 are connected to a current source formed by the serial drain-source paths of NMOS transistors MN305 and MN307. The gate of the NMOS transistor MN305 is provided with a bias voltage from a voltage supply line 366. The gate of the NMOS transistor MN307 is provided with bias voltage from a voltage supply line 368 and has its source connected to a ground reference line 369.
The arrangement of PMOS transistors MP309 and MP311 and NMOS transistors MN 320 and MN322 connected between positive supply line 360 and ground reference line 369 is coupled to the drain of NMOS transistor MN301 between the drain of PMOS transistor 309 and the source of PMOS transistor MP311. NMOS transistors MN320 and MN322 form a cascoded current bias arrangement for the cascoded PMOS transistors MP309 and MP311. Similarly, the arrangement of PMOS transistors MP313 and MP315 and NMOS transistors MN 324 and MN326 connected between positive supply line 360 and ground reference line 369 is coupled to the drain of NMOS transistor MN302 between the drain of PMOS transistor 313 and the source of PMOS transistor MP315. NMOS transistors MN324 and MN326 form a cascoded current bias arrangement for the cascoded PMOS transistors MP313 and MP315. A bias supply line 362 supplies a bias to the gates of the PMOS transistors MP309 and MP313 and a bias supply line 369 supplies a bias to the cascoded PMOS transistors MP311 and MP315. The gates of NMOS type cascoded transistors MN320 and MN324 receive a bias voltage from the supply line 366 and the gates of NMOS bias current transistors MN322 and MN326 receive a bias voltage from the supply line 368.
Cascoded P type transistors MP309 and MP311 couple the output obtained from the NMOS transistor MN301 to the gate of a PMOS transistor MP342 which has its source connected to positive supply line 360 and its drain connected to cascoded NMOS transistors MN328 and MN330. NMOS transistors MN328 and MN330 connected between the drain of the PMOS transistor MP342 and the ground reference line 369 form a current source for the PMOS transistor MP342. A single ended output is provided by PMOS transistor MP342 at terminal 350. Similarly, cascoded PMOS transistors MP313 and MP315 couple the output obtained from the NMOS transistor MN302 to the base of a PMOS transistor MP340 which has its source connected to positive supply line 360 and its drain connected to cascaded NMOS transistors MN332 and MN334. NMOS transistors MN332 and MN334 connected between the drain of the PMOS transistor MP340 and the ground reference line 369 form a current source for the PMOS transistor MP340. A single ended output is provided by PMOS transistor MP340 at terminal 352.
The use of a CMOS operational amplifier circuit such as shown in FIG. 3 provides the advantages of compatibility with integrated circuit arrangements used in present electronic apparatus and minimum power consumption. There remains a problem, however, in that the input to the operational amplifier from the transducer must be referenced to the same fixed reference potential point as the output of the amplifier. In FIG. 2, the transducer 103 connected to the voltage buffer 207 and the output of the voltage buffer must both be referenced to the same ground potential point. Accordingly, restrictions are imposed on the ground connections of components on the input side of the voltage buffer which severely limit the operational arrangements of the transducer. With respect to a magneto-resistive head, the normal operation of the head in a fixed disk unit requires that the head be isolated from a fixed ground potential.